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Julieñ
2025-12-09 15:48:10 +01:00
parent cf6666cabc
commit 1e2e667126
83 changed files with 148155 additions and 33 deletions
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39
server_rack/scad/nano_itx_mount.scad
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@@ -5,9 +5,10 @@ include <boltsos_0.4.1/BOLTS.scad>
include <nano_itx_board.scad>
frame_l=130;
mini_l=180;
nano_l=130;
frame_e=3;
p_height=5;
p_height=6;
module pilar() {
difference() {
@@ -24,21 +25,31 @@ color("red") {
translate([56.4,-56.4,5]) zcyl(l=20, d=1);
}
color("pink") {
// base_plate
// base_plate
difference() {
cuboid([frame_l,frame_l,frame_e], rounding=3, edges=[FWD+RIGHT,FWD+LEFT,BACK+RIGHT,BACK+LEFT]);
cuboid([frame_l-30,frame_l-30,frame_e+1], rounding=3, edges=[FWD+RIGHT,FWD+LEFT,BACK+RIGHT,BACK+LEFT]);
union() {
cuboid([mini_l,mini_l,frame_e], rounding=3, edges=[FWD+RIGHT,FWD+LEFT,BACK+RIGHT,BACK+LEFT], anchor=[0,0,1]);
cuboid([nano_l+8,nano_l+8,frame_e+1], rounding=3, edges=[FWD+RIGHT,FWD+LEFT,BACK+RIGHT,BACK+LEFT], anchor=[0,0,-1]);
}
cuboid([nano_l+2,nano_l+2,frame_e+1], rounding=3, edges=[FWD+RIGHT,FWD+LEFT,BACK+RIGHT,BACK+LEFT], anchor=[0,0,-1]);
cuboid([nano_l-8,nano_l-8,frame_e*3], rounding=3, edges=[FWD+RIGHT,FWD+LEFT,BACK+RIGHT,BACK+LEFT]);
cuboid([nano_l+12,nano_l-20,frame_e+2], anchor=[0,0,-1]);
cuboid([nano_l-20,nano_l+12,frame_e+2], anchor=[0,0,-1]);
}
*rect_tube(3, frame_l, wall=frame_e*6, rounding=frame_e, irounding=frame_e/2, center=true);
color("pink") {
difference() {
cuboid([nano_l,nano_l,frame_e], rounding=3, edges=[FWD+RIGHT,FWD+LEFT,BACK+RIGHT,BACK+LEFT], anchor=[0,0,-1]);
cuboid([nano_l-30,nano_l-30,frame_e+1], rounding=3, edges=[FWD+RIGHT,FWD+LEFT,BACK+RIGHT,BACK+LEFT]);
}
*rect_tube(3, frame_l, wall=frame_e*6, rounding=frame_e, irounding=frame_e/2, center=true);
// pcb_supports
translate([0,0,p_height-1]) {
translate([-56.4,-41.9,0]) pilar();
translate([-56.4,56.4,0]) pilar();
translate([56.4,56.4,0]) pilar();
translate([56.4,-56.4,0]) pilar();
// pcb_supports
translate([0,0,p_height]) {
translate([-56.4,-41.9,0]) pilar();
translate([-56.4,56.4,0]) pilar();
translate([56.4,56.4,0]) pilar();
translate([56.4,-56.4,0]) pilar();
}
}
}
translate([0,0,10]) pcb();